Field ID is used to identify if the field being read/written is even or odd. This register is only available with interlaced video. The register is R/W for the Frame Buffer Read and Read only for the Frame Buffer Write.
Perform the following to access the 64-bit DDR memory location:
- Change the IP address width to 64-bit in the IP GUI.
- In Vivado address editor, unmap the HP0_DDR_LOW base name, which has a 0x0000_0000 offset address with a 2G band.
- Auto-assign addresses to map DDR_LOW and DDR_HIGH address spaces for 64-bit mode.
- Vivado will get DDR_HIGH offset address as 0x0000_0008_0000_0000 with 32G band. The IP can use any address as a source/destination buffer address.