Ensure that all the timing constraints for the core were properly incorporated from the example design and that all constraints were met during implementation.
- Does it work in post-place and route timing simulation? If problems are seen in hardware but not in timing simulation, this could indicate a PCB issue. Ensure that all clock sources are active and clean.
- If using MMCMs in the design, ensure that all MMCMs have obtained lock by monitoring the
- If the streaming data coming out of the Video Frame Buffer Read core has the wrong colors, check the Memory Video Format register and ensure that the proper video format used in memory is programmed in the register. Also, each memory video format has a corresponding streaming video format. For example, the memory format RGB8 outputs RGB streaming data. Ensure that the system is expecting the proper streaming video format.
- If the data written to memory by the Video Frame Buffer Write seems to be in the wrong format, check the Memory Video Format register. Ensure that the proper video format used in memory is programmed in the register.