Running the Example Design - 2.5 English

Video Frame Buffer Read and Video Frame Buffer Write LogiCORE IP Product Guide (PG278)

Document ID
PG278
Release Date
2023-10-19
Version
2.5 English

The synthesizable example design requires both Vivado and AMD Vitis™ tools. To run the example design, perform the following:

  1. Run synthesis, implementation and bitstream generation in AMD Vivado™ .
  2. After completing step 1, select File > Export > Export Hardware. In the window, select Include bitstream, select an export directory, and click OK to Create XSA.
    Figure 1. Vitis XSA Creation

    The remaining work is performed in AMD Vitis tool. The example design files can be found in the following Vitis directory:

    (<install_directory>/<release>/data/embeddedsw/XilinxProcessorIPLib/drivers/ v_frmbuf_rd_v4_5/examples/ (<install_directory>/<release>/data/embeddedsw/XilinxProcessorIPLib/drivers/ v_frmbuf_wr_v4_5/examples/