The Xilinx ® Sensor Demosaic core is easily configured to meet your specific requirements through the Vivado Design Suite. This section provides a quick reference to parameters that can be configured at generation time.
X-Ref Target - Figure 4-1
The screen displays a representation of the IP symbol on the left side, and the parameter assignments on the right side, which are described as follows:
• Component Name: The component name is used as the base name of output files generated for the module. Names must begin with a letter and must be composed from characters: a to z, 0 to 9, and “_”.
• Samples Per Clock : Specifies the number of pixel processed per clock cycle. Permitted values are 1, 2, 4, and 8 samples per clock. This parameter determines the throughput of the IP. The more samples per clock, the larger throughput it provides. The larger throughput always needs more hardware resources.
• Maximum Data Width : Specifies the bit width of input samples. Permitted values are 8, 10, 12, and 16 bits. This parameter should match the Video Component Width of the video IP core connected to the slave AXI4-Stream video interface.
• Maximum Number of Columns : Specifies maximum video columns/pixels the IP core could produce at run time. Any video width that is less than the Maximum Number of Columns can be programmed through AXI4-Lite control interface without regenerating the core.
• Maximum Number of Rows : Specifies maximum video rows/lines the IP core could produce at run time. Any video height that is less than the Maximum Number of Rows can be programmed through AXI4-Lite control interface without regenerating the core.
• Interpolation Method : There are two interpolation methods from which to choose:
° Fringe Tolerant Interpolation : This method produces softer images with suppressed fringing artifacts. Use this option for low-cost optics that could possibly introduce color fringing artifacts.
° High Resolution Interpolation : This method is suggested for high quality optics and applications where high resolution is essential. Selecting this uses more block RAMs and slices and approximately doubles the number of DSP48s.
• Horizontal Zipper Artifact Removal : This option adds a post processing smoothing filter to remove horizontal zipper artifacts. The post processing filter softens the output image, and incurs some additional slice resources.
• Use UltraRAM for Line Buffers : In UltraScale+ devices, line buffers used for interpolating the pixels can be stored in UltraRAM instead of Block RAM.