AXI4-Lite Interface Signals - 2.0 English

PG289 SMPTE UHD-SDI TX Subsystem

Document ID
PG289
Release Date
2022-05-18
Version
2.0 English

These signals are available when the AXI4-Lite interface option is enabled.

Table 2-2: AXI4-Lite Interface Signals

Signal

I/O

Description

s_axi_aclk

I

AXI4-Lite clock

s_axi_arstn

I

AXI4-Lite synchronous reset. Active-Low.

S_AXI_CTRL*

AXI4-Lite interface, defined in the Vivado Design Suite: AXI Reference Guide (UG1037) [Ref 11] .