Functional Description - 2.0 English

PG289 SMPTE UHD-SDI TX Subsystem

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2.0 English

The SDI interface to the audio embedder consists of input and output ancillary data streams from the SMPTE UHD-SDI TX Subsystem. The audio interface is a 32-bit AXI4-Stream slave bus. The following figure shows the UHD-SDI Audio (Embed) IP block diagram.

Figure 3-3:      UHD-SDI Audio (Embed) IP Block Diagram

X-Ref Target - Figure 3-3


The AXI4-Stream audio interface carries audio samples in AES3 format. The data width over the AXI4-Stream audio interface is fixed at 32-bit to carry one AES3 sub-frame as shown in the following figure. TID indicates the channel number of the audio sample data.

Figure 3-4:      AES3 Sub-frame Format with 24-Bit Audio Sample

X-Ref Target - Figure 3-4


In HD-SDI mode, as per SMPTE ST 272, up to 16 channels of audio are inserted on data stream 1. In non-SD modes, as per SMPTE ST 299-1, up to 16 channels of audio are inserted onto data streams 1 and 2. In 3G, 6G and 12G SDI modes, as per SMPTE 299-1 and SMPTE ST 299-2, up to 32-channels of audio are inserted onto data streams 1, 2, 3 and 4. Audio control packets are inserted on data stream 1 and 3 (Y Video In) and data packets are inserted on data stream 2 and 4 (CBCR Video In). Remaining data streams from the SMPTE UHD-SDI TX Subsystem are delayed to match the latency of the audio insertion. Audio embedded and latency matched data streams are sent back to the SMPTE UHD-SDI TX Subsystem for further processing.

The following figure highlights the SDI Interface to the audio embedder in 12G SDI mode with eight data streams. The audio embedder bypasses the non-audio ancillary packets before inserting the audio packets in the blanking region.

Figure 3-5:      SDI Interface Diagram of Audio Embedder

X-Ref Target - Figure 3-5


IMPORTANT:   Audio samples should be placed on AXI4-Stream audio interface as per the audio sample rate. The Audio Embedder does not support burst audio samples that violate the audio sample rate from the external AXI4-Stream interface master.