Know the Degree of Difficulty - 2.0 English

SMPTE UHD-SDI TX Subsystem (PG289)

Document ID
Release Date
2.0 English

The SMPTE UHD-SDI TX Subsystem design is challenging to implement in any technology, and the degree of difficulty is further influenced by:

Maximum system clock frequency

Targeted device architecture

Nature of the user application

All SMPTE UHD-SDI TX Subsystem implementations require careful attention to system performance requirements. Pipelining, logic mappings, placement constraints, and logic duplications are all methods that help boost system performance.