Running the Design on Hardware - 2.0 English

SMPTE UHD-SDI TX Subsystem (PG289)

Document ID
PG289
Release Date
2023-05-16
Version
2.0 English

The following steps are used to run the BIT and ELF files on the hardware setup:

1. Connect the JTAG cable and USB UART cable to the board.

2. Go to <Component Name>_ex/imports

3. Start the Xilinx Software Debugger (XSDB):

source xsdb.tcl

4. To observe the results, open Tera Term or PUTTY, and configure the serial port (Interface 0) to 115200 baud with the default configuration. Ensure that the UART cable is connected to the board and the PC.

The UART console displays the SDI stream details on the console.