APG Config Register (0x08) - 2.0 English

SMPTE UHD-SDI Receiver Subsystem Product Guide

Document ID
PG290
Release Date
2022-04-26
Version
2.0 English

This registers provides capability to enable/disable the core.

Table C-5: APG Config Register

Name

Default
Value

Access

Description

Channel count

0x2

RW

[31:24] Set number of audio channels. Valid values are 2, 4, 6 and 8.

Data width

0x4

RW

[23:16]

Specify the width of audio data samples. Valid values are:

001 – 16 bit audio samples
010 – 20 bit audio samples
100 – 24 bit audio samples

Sampling Frequency

0x2

RW

[15:8]

Specify the sampling rate of the audio samples. Valid values are:

000 – 32 kHz
001 – 44.1 kHz
010 – 48 kHz

Pattern

0x0

R/W

[7:0]

Select from internal patterns. Valid values are:

000 – 1 kHz sine wave
001 – 2 kHz sine wave
010 – 1 kHz sine wave on left, 2 kHz sine wave on right channel
111 – Incremental pattern