Clock Frequency Selection - 2.0 English

SMPTE UHD-SDI RX Subsystem (PG290)

Document ID
PG290
Release Date
2023-05-17
Version
2.0 English

The SMPTE UHD-SDI RX Subsystem has multiple clock domains and has many CDC paths across the core. It is recommended to use the maximum allowed clock frequency to reduce the uncertainty due to clock domain crossing paths.