1. Open the Vivado Design Suite and create a new project.
2. In the pop-up window, press Next five times.
3. Select the VCK190 Board.
X-Ref Target - Figure 5-45
4. Click Finish .
5. In the IP Catalog, under Video Connectivity, double-click SMPTE UHD-SDI RX Subsystem .
X-Ref Target - Figure 5-46
Note: For the application example design flow, the IP configuration is based on options selected in the Application Example Design tab. You can rename the IP component name, which is used as the application example design project name.
6. Configure the SMPTE UHD-SDI RX Subsystem Application Example Design tab:
a. Selecting VCK190 as the Target Board.
b. Select Versal_Audio-Video Pass-Through as Design Topology and available Board Part name.
c. Click OK .
The Generate Output Products dialog box appears.
X-Ref Target - Figure 5-47
7. Click Generate .
Note: Click Skip if you only want to generate the application example design.
8. Under Design source, right-click the SMPTE UHD-SDI RX Subsystem component, and then select Open IP Example Design .
9. Choose the target project location, and click OK . The IP integrator design is then generated and creates the Xilinx® Vitis™ software platform and generates an executable .elf file. You can choose to Run Synthesis , Implementation , or Generate Device Image . An overall system IP integrator block diagram of the VCK190-based application example design is displayed, as shown in This Figure .
X-Ref Target - Figure 5-48