MODE_DET_STS Register (0x44) - 2.0 English

SMPTE UHD-SDI Receiver Subsystem Product Guide

Document ID
PG290
Release Date
2022-04-26
Version
2.0 English

This register provides the SDI mode detection status .

Table 2-30: ODE_DET_STS Register Bit Mapping

Bits

Name

Access

Default Value

Description

31:8

Reserved

RO

0

Reserved

7

RX_3G_LEVEL_B

RO

0

Asserted High when incoming stream is 3G-SDI level B

6:4

RX_ACT_STREAMS

RO

1

RX active data streams

3’b000: 1 active stream;

3’b001: 2 active streams (Default);

3’b010: 4 active streams;

3’b011: 8 active streams;

3’b100: 16 active streams;

3

RX_MODE_LOCKED

RO

1

RX mode locked indication

If bit 5 of MODULE_CTRL is not set, then this bit will be set to 1’b1

2:0

RX_MODE

RO

0

3’b000: HD-SDI Mode (default);

3’b001: SD-SDI Mode;

3’b010: 3G-SDI Mode;

3’b100: 6G-SDI Mode;

3’b101: 12G-SDI 11.88 Gb/s Mode;

3’b110: 12G-SDI 11.88/1.001 Gb/s Mode;