Table 2-34: RX_EDH_ERRCNT Register Bit Mapping Bits Name Access Default Value Description 31:16 Reserved RO 0 Reserved 15:0 RX_EDH_ERRCNT RO 0 SD-SDI mode EDH error counter. It increments once per field when any of the error conditions enabled by the RX_EDH_ERRCNT_EN register bit(s) occur during that field.