Use the Example Design as a Starting Point - 2.0 English

SMPTE UHD-SDI Receiver Subsystem Product Guide

Document ID
PG290
Release Date
2022-04-26
Version
2.0 English

Each instance of a SMPTE UHD-SDI RX Subsystem that is created is delivered with an example design that can be implemented in Xilinx FPGA. This design can be used as a starting point for your own design or can be used to troubleshoot the user application, if necessary.