1G/10G/25G Supported Features - 2.7 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

Document ID
PG292
Release Date
2023-10-18
Version
2.7 English
  • Complete MAC and PCS functions
  • 10G BASE-R mode based on IEEE 802.3 Clause 49 or 1000BASE-X mode based on IEEE 802.3 Clause 36
  • 32-bit/64-bit AXI4-Stream user interface for the MAC + PCS mode of operation
  • XGMII and GMII interfaces for the PCS-only mode of operation
  • AXI4-Lite control and status interface
  • Statistics and diagnostics
  • Custom preamble and adjustable interframe gap for the 64-bit variant
  • Optional Clause 73 Auto-Negotiation with Parallel Detection support
  • Optional Clause 72 Link Training for the 64-bit variant
  • Optional Clause 74 FEC sublayer: shortened cyclic code (2112, 2080) for the 64-bit variant
  • Optional Clause 108 RS-FEC for 64-bit variant
  • Optional 802.1CM preemption feature for 64-bit variant
  • Pause Processing including IEEE Std 802.3 Annex 31D (priority based flow control) for the 64-bit variant
Table 1. Feature Compatibility Matrix
Variant User Interface MAC PCS Pause Process-ing Auto Negotia-tion Clause 73 3 Auto Negotia-tion Clause 37 3 Link Training 3 Clause 74 FEC 3 Clause 108 RS FEC IEEE 1588 HW Time Stamp
1G/10GMAC with PCS 1 32-bit AXI4-Stream X X   X         X
1G/10G/25G MAC with PCS 2 64-bit AXI4-Stream X X X X   X X X  
1G/10G PCS only 32-bit XGMII and GMII   X   X X        
Preemption (802.1CM) 1G/10G/25G only 4 64-bit AXI4-Stream X X           X X
1/10G MAC with PCS, GTY 4 64-bit AXI4-Stream X X X            
1G/10G MAC with PCS, GTH 64-bit AXI4-Stream X X X X          
  1. Only two-step timestamping is supported.
  2. The 64-bit option is the only available option for the 1G/10G/25G targeting the GTY transceiver.
  3. This feature is not supported for Versal devices.
  4. Preemption supports both 1-step and 2-step timestamping.