CONFIGURATION_1588_REG: 0x0190 - 2.7 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

Document ID
PG292
Release Date
2023-10-18
Version
2.7 English
Table 1. CONFIGURATION_1588_REG: 0x0190
Bits Default Type Signal
0 1 RW ctl_tx_lat_adj_enb
1 1 RW ctl_rx_lat_adj_enb
Note: For 1G mode, this register is RESERVED.
2 0 RW ctl_ptp_transpclk_mode
3 0 RW ctl_tx_timestamp_adj_enb
Note: For 1G mode, this register is RESERVED.
4 1 RW ctl_rx_timestamp_adj_enb
Note: For 1G mode, this register is RESERVED.