Clause 74 FEC Interface Control/Status/Statistics Signals - 2.7 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

Document ID
PG292
Release Date
2022-05-11
Version
2.7 English

Ports in the following table are available when Clause 74 (BASE-KR FEC) is selected from the Configuration tab.

Table 1. Clause 74 FEC Interface Control/Status/Statistics Signals
Name Size I/O Description
ctl_fec_tx_enable_* 1 I Asserted to enable the clause 74 FEC encoding on the transmitted data.
ctl_fec_rx_enable_* 1 I Asserted to enable the clause 74 FEC decoding of the received data.
ctl_fec_enable_error_to_pcs_* 1 I Clause 74 FEC enable error to pcs.
stat_fec_inc_correct_count_* 4 O This signal will be asserted roughly every 32 words, while the ctl_rx_fec_enable is asserted, if the FEC decoder detected and corrected a bit errors in the corresponding frame.
stat_fec_inc_cant_correct_count_* 4 O This signal will be asserted roughly every 32 words, while the ctl_rx_fec_enable is asserted, if the FEC decoder detected bit
stat_fec_lock_error_* 4 O stat_fec_lock_error_* is asserted if the FEC decoder has been unable to detect the frame boundary after about 5 ms. It is cleared when the frame boundary is detected.
stat_fec_rx_lock_* 4 O This signal is asserted while the ctl_fec_rx_enable is asserted when the FEC decoder detects the frame boundary.