Core xci Top Level Port List - 2.7 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

Document ID
PG292
Release Date
2022-05-11
Version
2.7 English

The top level port list for the core xci with all features enabled is listed below:

In the following tables, an asterisk (*) represents the CORE number, having a value from 0 to 3.

Example: port_name_*

  • port_name_0: for first CORE
  • port_name_1: for second CORE (present when you select number of cores ≥2)
  • port_name_2: for third CORE (present when you select number of cores ≥3)
  • port_name_3: for fourth CORE (present when you select number of cores =4)