AXI Timer IP Core - 3.1 English

DisplayPort 1.4 TX Subsystem Product Guide

Document ID
PG299
Release Date
2022-10-19
Version
3.1 English

A 32-bit AXI Timer IP core is used in the DisplayPort 1.4 TX Subsystem. When the HDCP controller is enabled for encryption the AXI Timer can be accessed through the AXI4 master interface for basic timer functionality in the system.