Port Description - 3.0 English

DisplayPort 1.4 RX Subsystem Product Guide (PG300)

Document ID
Release Date
3.0 English
Table 1. Port Description
Signal Name Direction Description
s_axi_aclk Input AXI Clock
s_axi_aresetn Input AXI Reset. Active-Low
s_axi** Input AXI4-Lite interface, defined in the Vivado Design Suite: AXI Reference Guide (UG1037)
ctl_clk Input Free running clock. s_axi interface clock is connected
ctl_reset Input Reset signal and external reset is connected
iic_scl_in Input I2C bus SCL input
iic_sda_in Input I2C bus SDA input
iic_sda_out Output I2C bus SDA output