This section details the registers available in the DisplayPort 1.4 RX Subsystem. The address map is split into the following regions:
- DisplayPort RX IP
- AXI IIC
- HDCP Controller
- AXI Timer
The address offsets of the helper cores is shown in the following table.
|Helper Core||Address Space||Address Offset|
|HDCP 1.x Subsystem||4K||0x0000_4000|
|HDCP 2.x Subsystem||16K||0x0000_8000|
The subsystem address propagation in the Vivado® IP integrator assigns the maximum addresses based on full-featured configuration. Ensure the following steps are taken:
- Confirm that the DisplayPort 1.4 RX Subsystem IP
is mapped to a base address where the 14th bit in the address is 0. For example,
0x44A00000is correct and
- Ensure that all 14 bits of the address range are reserved for the DisplayPort 1.4 RX Subsystem IP.