The table below describes the differences between the DMA/Bridge Subsystem for PCI Express® and QDMA Subsystem for PCI Express.
DMA/Bridge Subsystem | QDMA Subsystem | |
---|---|---|
Configuration | Up to Gen3x16. | Up to Gen3x16. |
Channels/Queues | Four Host to Card (H2C) channels, and four Card to Host (C2H) channels with one PF. | Up to 2K queues (All can be assigned to one PF or distributed amongst all four). |
SR-IOV | Not Supported. | Supported (four PFs, and 252 VFs). |
User Interface | Configured for AXI4 Memory Mapped or AXI4-Stream, but not both. | Each queue will have a context which will determine whether it goes to a AXI4 Memory Mapped or AXI4-Stream. |
User Interrupts | Up to 16 user interrupts. | Interrupt aggregation per function. |
Device Support | Supported for 7 Series Gen2 to AMD UltraScale+™ devices. | Only supported for UltraScale+ devices. |
Interrupts | Legacy, MSI, MSI-X supported. |
MSI-X Supported. |
Driver Support | Linux, Windows Example Drivers. | Linux, DPDK, Windows. |