The PCIe Requester Request (RQ)/Requester Completion (RC) interface generates PCIe TLPs on the RQ bus and processes PCIe Completion TLPs from the RC bus. This interface to the AMD UltraScale+ Integrated Block for PCIe® core operates in DWord aligned mode. With a 512-bit interface, straddling is enabled. While straddling is supported, all combinations of RQ straddled transactions might not be implemented. For further details, see the UltraScale+ Devices Integrated Block for PCI Express LogiCORE IP Product Guide (PG213).