This register returns the status of the interrupt bits.
|Bit||Default Value||Access Type||Description|
|1||0||R/W1C||Overflow Interrupt: This bit is set when the IP is not able to send all enabled audio channels in time. This interrupt would indicate loss of samples. Write a ‘1’ to clear this flag.|
|0||0||R/W1C||AES Block Completed: This bit is set when a complete AES block has been received (192 AES frames). This bit is set every time the IP receives one block of audio. Write a ‘1’ to clear this flag.|