The AXI4-Lite Slave provides the read/write control logic to the core register set. The registers are accessible by the external AXI4-Lite master. The data width of the AXI4-Lite interface is fixed at 32 bits. The register set can be reset to default values by writing 0x1 to the soft reset register (offset - 0x04).
When AXI4-Lite interface is disabled, UHD-SDI Audio IP core accepts the
configuration through sdi_embed_config/sdi_extract_config
and conveys the status through
sdi_embed_status/sdi_extract_status signals.