Recovered Clock Interface - 2.0 English

UHD SDI Audio LogiCORE IP Product Guide (PG309)
Document ID
PG309
Release Date
2021-12-01
Version
2.0 English
Table 1. UHD-SDI Audio (Extract) Signal Description
Port Name Width I/O Description
rec_clk Ceil (Maximum Audio Channels/4) Output Clock recovered using clock phase data for non-SD SDI modes. This signal is only valid when clock phase logic is enabled.
  • Bit 0 - Clock recovered from Group 1
  • Bit 1 - Clock recovered from Group 2

through

  • Bit 7 - Clock recovered from Group 8