Addressing - 1.1 English

RAMA 1.1 LogiCORE IP Product Guide (PG310)

Document ID
PG310
Release Date
2021-01-21
Version
1.1 English

The RAMA IP is transparent to all slave address segments. Slave address segments can be mapped from an attached slave through the RAMA IP to an attached master. No range checking is carried out in the RAMA IP on address segments mapped versus the address in a transaction.

An address re-mapping is carried out by the Memory Interleave function of the RAMA IP. For this case multiple HBM pseudo-channels are reorganized such that the pseudo-channels are interleaved per burst fragment.

It is your responsibility to ensure that the correct memory segments are mapped to the AXI master to correctly use the memory interleaving feature. For example, if memory interleaving across four HBM pseudo-channels is selected but only two pseudo-channels are enabled on the HBM IP, the RAMA IP will not detect the error at build time.