AxSize/AxLen Conversion and Chopping - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2023-11-01
Version
1.0 English

The NMU and NSU perform different AxSize/AxLen conversions based on AxCache[1] (modifiable/non-modifable), AxBurst (INCR, WRAP, FIXED) and AxLock (exclusive access).

This section first covers NMU and NSU AXI conversion for AxBurst of INCR to provide some background of conversion. Then it covers the specifics of AxBurst of WRAP, AxBurst of FIXED, Exclusive Access and AXI4-STREAM.

For modifiable transactions with AxBurst of INCR, the NMU performs the following conversions on a read request or write request:

  • Convert the AxSize of the master to the AxSize of the NoC (128-bit).
  • For DDR transactions, chopping is done at minimum size between the DDR-interleave-granularity (if DDR-interleave is enabled) and the default chop size of 256 bytes.
  • For non-DDR transactions, chopping is done at the default chop size, 256 bytes.
  • For exclusive access, the NMU does not perform chopping. The NMU sends modifiable exclusive access in non-modifiable format in NPP. AxCache[1] is not modified by the NMU.
For modifiable transactions with AxBurst of INCR, the NSU performs the following conversions on a read request or write request:
  • Convert the AxSize of the NoC 4 (128-bit) to the AxSize of the Slave. The AxSize of the slave is assumed to be the same as the Interface Width of the slave.
  • Chopping is done at the address boundary of (AxSizeSlave*256) for AXI4 regardless of AxLen.
  • For exclusive access, the NSU does not perform chopping. The NSU sends modifiable exclusive access in non-modifiable format in NPP. AxCache[1] is not modified by the NSU.
For non-modifiable transactions with AxBurst of INCR, the NMU performs the following conversions on a read request or a write request:
  • If the AxSize of the master is larger than the AxSize of the NoC (128-bit), downsize and signal an interrupt.
  • If the AxSize of the master is less than AxSize of the NoC (128-bit), do a narrow transfer.
  • For DDR transactions, if the AxSize of the master is less than the AxSize of the NoC (128-bit), the NMU would force-upsize to 4 (128-bit) and send an interrupt to the CIPS, because the DDR NSU has a fixed AxSize of 4 (128-bit) and does not perform AXI conversion.
  • For exclusive access, the NMU does not perform chopping.
For non-modifiable transactions with AxBurst of INCR, the NSU performs the following conversions on a read request or a write request:
  • If the AxSize of the NoC (narrow-transferred from master) is larger than the Interface Width of the slave, downsize and signal an interrupt.
  • If the AxSize of the NoC (narrow-transferred from master) is smaller than the Interface Width of the slave, narrow-transfer the AxSize of the NoC(narrow-transferred from master). It is assumed that the NoC slave supports any AxSize less than or equal to its Interface Width.
  • Chopping is done at the address boundary of (AxSizeSlave*256) for AXI4 regardless of AxLen.

For modifiable or non-modifiable write response, both the NMU and the NSU do not perform AXI conversion. Write responses from chopped NMU or NSU transactions are merged by the write response trackers in the NMU and the NSU.

For modifiable transactions with AxBurst of INCR, the NSU performs the following conversions on a read response:
  • If the AxSize of the slave is less than 4 (128-bit), the read tracker has a 128-bit read data buffer and it collects 128 bits of read data before returning read data to the NoC.
  • If the AxSize of the slave is larger than 4 (128-bit), downsize to the AxSize of the NoC (128-bit).
  • The slave is back-pressured if the 128-bit read data buffer is full.
For modifiable transactions with AxBurst of INCR, the NMU performs the following conversions on a read response:
  • The NMU read re-order buffer (RROB) saves 128-bit read data into the read data buffer.
  • The RROB presents read return data to the AXI conversion block in the format of the AxSize of the master.
  • If the width of the master is 256 or 512, the RROB is responsible for providing contiguous read data cycles to fill the width of 256 or 512. (i,e., no read interleaving should occur).
For non-modifiable transactions with AxBurst of INCR, the NSU performs the following conversions on a read response:
  • If the AxSize of the slave is less than 4 (128-bit), provide narrow-transfer read data to the read tracker. The read tracker will not upsize the read data to 128-bit format. Rather, it will return the narrow-transfer read data to the NoC.
For non-modifiable transactions with AxBurst of INCR, the NMU performs the following conversions on a read response:
  • The NMU RROB saves narrow-transferred read data and performs 128-bit upsizing in the read data buffer (RDB).
  • The NMU AXI conversion block behaves the same as for a modifiable transaction.

For WRAP Transactions

  • WRAP read of 32B and 64B are supported. WRAP write of 64B is supported.
  • The AxSize of the master must be equal to 2, 3, or 4 (32-, 64-, or 128-bit).
  • For AxSizeMaster of 4 (128-bit) read/write requests, AxBurst of WRAP is sent as is. For WRAP read, the NMU RROB data return path treats return data as INCR.
  • For any other case (AxSizeMaster of 2 or 3), the NMU translates WRAP operation into a single AxBurst of INCR transaction at the wrapped size boundary.
    • For reads, the NMU RROB waits until complete data has been returned to the RROB data buffer before returning data to the master in WRAP order.
    • For writes, the NMU waits until complete write data is available from the master, and then it sends the data to the NSU in INCR order.
  • The AXI conversion blocks in the NSU perform AxBurst of WRAP for AxSizeMaster of 4.
  • The interface width of the slave must be wider than or equal to 4 (128-bit) to support AxBurst of WRAP in the NSU.
  • The AXI conversion blocks in the NMU convert to AxBurst of INCR for AxSizeMaster of 2 or 3.
  • DDR only receives AxBurst of WRAP for AxSizeMaster of 4.

For FIXED Transactions

  • The NMU and NSU follow the non-modifiable flow to narrow-transfer all requests and responses.
  • The AxSize of the master must be less than or equal to 4 (128-bit).
  • The AxSize of the master must be less than or equal to the Interface Width of the slave.
  • The AXI conversion block uses the same AxAddr for chopping and narrow-transfer.
  • AxLen is limited to 15 by the AXI Spec. Maximum transaction size is 16B*16 = 256B. FIXED transactions are chopped at a default chopsize of 256 bytes. Chop is based on AxAddr alignment to the chopsize.

For Exclusive Access

  • Only INCR AxBurst is supported.
  • No chopping is performed by the AXI conversion block.
  • For DDR, AxLenMaster = 0(1-flit) and AxSizeMaster <= 4(128-bit), the NMU sends the AxSizeMaster instead of the AxSize of 4 (128-bit) in the AxSizeNoC. (This follows the non-modifiable non-DDR INCR packet conversion rule).
  • For DDR, AxLenMaster > 0(1-flit), the NMU converts the packet to AxSize of 4 (128-bit) for modifiable and non-modifiable. Read over-fetch is expected. (This follows the modifiable non-DDR INCR packet conversion rule).
  • For non-DDR slaves, the AXI conversion is same as for normal INCR non-modifiable.
  • For AXI4 with Exclusive Access size of 32B/64B/128B, the corresponding AxSizeSlave cannot be less than 2B/4B/8B respectively (to avoid downsize chopping in the NSU).

For AXI4-Stream

  • The NMU and NSU follow the modifiable write flow to fully pack the 128-bit NoC channel.
  • The NMU handles AXI4-Stream as AXI-MM-modifiable-write with:
    Note: This bullet is for illustration only. AxSize is not an AXI4-Stream parameter.
    • AxSize of the master is set to be the same as the Interface Width of the master.
    • AxSize of slave is set to be the same as the InterfaceWidth of the slave.
  • For partially filled data flits (the first or last flit could be partially filled after conversion), TKEEP is used to indicate NULL data.
  • The AXI4-Stream NoC only supports a 64B chop size. This implies that if multiple NMUs send Stream packets to the same NSU, the packets may be interleaved on 64B granules. It is up to the user to sort and reassemble streaming packets.