Command and Data Parity - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2023-11-01
Version
1.0 English

The HBM Controller supports independent parity for the command, read data, and write data:

Command Parity Error
When a command parity error occurs, this is considered a fatal error and an interrupt will be triggered. The command will not be re-tried.
Read Parity Error
When a read parity error is detected, the HBM Controller will flag the violation and repeat the read command up to two times. If the second attempt finishes with a parity error, it will be logged, and the read transaction will be retired from the queue. Multiple retries will have performance implications.
Write Parity Error
When a write parity error is detected, the HBM Controller will flag the violation and repeat the write command up to two times. If the second attempt also finishes with a parity error, it will be logged, and the write transaction will be retired from the queue. Multiple retries will have performance implications.