Core Architecture - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

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1.0 English

Four NSUs provide access to a NoC Agent which performs the following:

  • NoC Agent contains the HBM MC status and interrupt registers.
  • Checks and generates ECC for the NoC flits.
  • Splits NoC transactions into 32 Byte commands.
  • Arbitrates the transactions to the HBM Controller.
  • Keeps track of transactions that are pending, in process, or completed pending data de-queue.

The HBM Controller receives the transactions and analyzes them for any coherency requirements then re-orders them to group transactions to minimize excessive page open/closures and read/write turnarounds. These commands are then sent to the PHY to handle the low level transactions with the HBM2e memory channel.

Figure 1. HBM Controller