DDR4 Interfaces - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English

The Versal DDRMC supports multiple DDR4 topologies and with each configuration there is a different set of PCB expansion options. Fundamentally each DDR4 topology has a unique pin map, so when it comes to PCB expansion paths you must use the same basic topology type like Dual Channel Components, Single Channel Components, UDIMM/SODIMM, or RDIMM/LRDIMM. For example, a Dual Channel Component interface must remain a Dual Channel Component interface in the future or an RDIMM/LRDIMM interface must remain an RDIMM/LRDIMM interface in the future. The pin maps do not support switching a topology from Single Channel Components to UDIMM, or UDIMM to an LRDIMM, or Dual Channel Components to Single Channel Components. It is also important to consider different DDR4 controller options if the future use case requires a new feature like Command/Address Parity, ECC, Pinout Swapping, or if the DM/DBI functionality will change.