DDRMC Calibration Debug - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

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1.0 English

All references to register names in the following sections can be obtained from the Vivado Hardware Manager Properties window and Properties tab, or via the Tcl command described in the previous section.

The register names provided in this section can be matched to register names in the NoC and Integrated Memory Controller NPI Register Reference (AM019). This document provides the NPI address values for each register, enabling you to implement your own method to check the calibration status. In this document, there are two sections, DDRMC_DDR4_XRAM Module and DDRMC_LPDDR4_XRAM Module. Select the appropriate module based on the target memory interface type, as the register contents and locations vary.