Available options in dual channel topology:
- Dual Channel 16-bit
- Dual Channel 32-bit
- Dual Channel 32-bit as 16-bit Data with 16-bit ECC
PCB Expansion Options:
All Dual Channel LPDDR4/4X interfaces will always give the Optimum option but it is possible to get a unique pinout with a Dual Channel 32-bit Pin Efficient option. Fundamentally there are two different Dual Channel LPDDR4/4X pinouts. One is the Dual Channel 32-bit Pin Efficient which only supports single rank devices and the other is all Dual Channel pinouts. The Pin Efficient pinout is unique as it only supports single rank 2 x 32-bit interfaces. The standard Dual Channel pinouts will support single channel and dual channel, single rank or dual rank, topologies. The fundamental pinouts for the standard Dual Channel configuration supports 16-bit, 32-bit, and 32-bit as 16-bit Data and 16-bit ECC configurations. This is because all configurations follow the same basic pinout while more Nibbles are used as the data width increases. As the data width expands from 16-bit to 32-bit or 32-bit to 48-bit additional Address/Command signals are generated for the additional LPDDR4/4X data channel. The Optimum pinout supports single or dual rank topologies. It is also possible for Single Channel interfaces to expand to Dual Channel interfaces. This is because the non-pin efficient Dual Channel 32-bit pinout is compatible with the individual LPDDR4/4X data channels along with their respective Command/Address bus. All Single Channel LPDDR4/4X interfaces will not be able to select the LP4 Pin Efficient option in the GUI to ensure forward compatibility with other topologies.
Figure 1. Standard Dual Channel 2 x 16-bit LPDDR4/4X Interface Pinout
Figure 2. Standard Dual Channel 2 x 32-bit LPDDR4/4X Interface Pinout
Figure 3. Pin Efficient Dual Channel 2 x 32-bit Single Rank LPDDR4/4X Interface Pinout
The connection guidance figures shown below must be followed for feasibility of PCB expansion options.
Figure 4. Connections for a 2x16 LPDDR4/4X Interface
Figure 5. Connections for a 2x32 LPDDR4/4X Interface
Figure 6. Connections for a Pin Efficient 2 x 32 Single Rank LPDDR4/4X Interface