On-the-fly scrubbing occurs when a correctable ECC error is detected on a read transaction. A Read-Modify-Write (RMW) operation is executed at the same memory address. A RMW is used in the event that a write had occurred after the correctable error was detected but before the controller had returned to complete the scrubbing. If an uncorrectable error is detected, on-the-fly scrubbing will not be performed. However if both correctable and uncorrectable errors are detected in a single burst, scrubbing will be performed.
Background scrubbing is the process of stepping through the DRAM doing RMW to each address to mitigate data loss via single event upset. The memory controller will utilize idle cycles to implement the scrubbing, and in the event of full traffic will periodically insert transactions to ensure progress is made. For DDR4, the background scrubbing period can be set by the user via the GUI. For LPDDR4/4X, the background scrubbing period is not a GUI option and is set to a fixed value of 20 μs.
The memory can be initialized with the proper ECC values at the end of memory calibration. The amount of memory to be initialized is configurable, and the memory controller will not execute any user commands until this process is completed. Initialization is not required, however the user must ensure that no reads are issued to an address that hasn't been written to first.