HBM Stack Temperature - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2023-11-01
Version
1.0 English

Each HBM Stack has a temperature sensor that can be read to ensure the temperature remains below the operating threshold. The CATTRIP over temperature signal is unavailable on Versal HBM devices, so it is critical that the stack temperature is monitored. Temperature is accessed by a sequence of writes and reads to 32-bit NPI registers described in the following table.

Note: The catastrophic temperature for the HBM stack is 120°C.
Table 1. HBM Stack Temperature
Operation Stack 0 NPI Address Stack 1 NPI Address
Write xF9E8_D7C6 xF6A4_400C xF721_400C
Read bit [0] == 0 1 xF6A4_4008 xF721_4008
Write x0000_0200 xF6A4_403C xF721_403C
Write x00A0_000F xF6A4_4038 xF721_4038
Read-modify-write, set bit [0] to 1 2 xF6A4_40F0 xF721_40F0
Read until bit [0] == 0 3 xF6A4_40F0 xF721_40F0
Read temperature data 4 xF6A4_40F8 xF721_40F8
Write x0000_0000 xF6A4_400C xF721_400C
  1. If bit [0] is 1, then the first operation did not complete successfully.
  2. When writing back, ensure the data in bits [31..1] are unchanged.
  3. Poll on this bit until bit [0] is 0, indicating successful retrieval of temperature data.
  4. Data bit [31] is the temperature valid bit and should be 0, bits [30:24] report the temperature in Celsius. A valid read of 0x0 means the temperature is at or below 0° Celsius.