LPDDR4 Refresh Options - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English
The DDRMC supports two DRAM refresh options for LPDDR4:
  • All-bank refresh
  • Per-bank Refresh

When all-bank refresh is used, all banks must be precharged before a refresh is issued. This means all banks are unavailable for the duration of the refresh operation (tRFC, e.g., 280 ns for 4267 speed). All-bank refresh makes the entire DRAM unavailable for about 7% of the time.

When per-bank refresh is used, each bank is issued a separate refresh command. This means while one bank is refreshed, the other banks are available. The duration of the per-bank refresh is shorter (tRFCpb, e.g., 140 ns for 4267 speed). Per-bank refresh makes each bank unavailable for about 3.5% of the time.

Using per-bank refresh may reduce and even eliminate the performance loss due to refresh. However, results heavily depend on traffic pattern and address mapping, and may in some cases be worse than all-bank refresh.