LPDDR4/4X Interfaces - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English

The Versal DDRMC supports either Single Channel or Dual Channel LPDDR4 interfaces. Most Single Channel and Dual Channel LPDDR4 pinouts are compatible with each other for future expansion but additional care needs to be taken in some configurations. It is also important to consider different LPDDR4 controller options like DM/DBI functionality, ECC, and Pinout Swapping when planning for future PCB expansion. A typical 32-bit LPDDR4 device operates as two channels, each 16-bits wide, and each has its own Command/Address bus. When using a 16-bit LPDDR4 device it has a single 16-bit data channel. When using a 48-bit LPDDR4 topology there are three 16-bit data channels. These must not be confused with the DDRMC configuration with regard to Single or Dual Channel. Single Channel refers to the DDMC operating as a single LPDDR4 interface. Dual Channel refers to the DDRMC operating as two LPDDR4 interfaces. A Single Channel 48-bit configuration is one LPDDR4 interface with three 16-bit data channels. A Dual Channel 32-bit configuration is two LPDDR4 interfaces, each with two 16-bit data channels.