Multi-Rank and 3DS DRAM Configurations - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English

Multi-rank and 3DS DRAM configurations primarily provide more storage, but may also provide performance benefits in some use cases. For example, a short-transaction random-access traffic pattern is often performance-limited by the number of DRAM banks or tFAW. By using multiple physical or logical ranks it is possible to achieve better performance.