NoC Functions - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English

The NoC components comprise:

NoC Master Unit (NMU)
The ingress block that connects a master to the NoC.
NoC Slave Unit (NSU)
The egress block that connects the NoC to a slave.
NoC Packet Switch (NPS)
The switch block that connects NoC blocks to form the full NoC network.
NoC Inter-Die Bridge (NIDB)
The block that bridges Vertical NoC (VNoC) between multiple Stacked Silicon Interconnect Technology (SSIT) dies.
NoC Clock Re-convergent Buffer (NCRB)
The block that handles clock skew at HNoC to VNoC re-convergent points.

Summary of some additional NoC terminology:

  • NoC Peripheral Interconnect (NPI), the internal register programming interconnect of the NoC.
  • NoC Packet Protocol (NPP).
  • NoC Peripheral Interconnect Root (NIR), the NPI ingress block that connects to PMC.
  • NoC Peripheral Interconnect Switch (NIS), the NPI switch block that switches NPI packets.
  • NoC Peripheral Interconnect Protocol Unit (NIP), the NPI egress block that connects the NPI to NoC component or Hard IP registers. This block can be standalone or integrated into Hard IP.