NoC Master Specified Destination ID - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English
Logic in the PL region may optionally drive the destination ID onto a set of pins on the NMU boundary. This ID is then used to route the transaction through the NoC to the intended NSU. The destination interface pins are shown in the following table.
Table 1. Destination Interface Pins
Interface Pin Description
NMU_RD_DEST_MODE Enable NMU_RD_USR_DST
NMU_RD_USR_DST[11:0] 12-bit destination ID to use for read transactions
NMU_WR_DEST_MODE Enable NMU_WR_USR_DST
NMU_WR_USR_DST[11:0] 12-bit destination ID to use for write transactions

When a destination interface is enabled by driving the RD_DEST_MODE or WR_DEST_MODE pin high, the value on the corresponding USR_DST pins will override any address decode.

Note: NoC Master Specified Destination ID routing is not supported in the current release.