NoC Packet Switch - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

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1.0 English

NMU and NSU interfaces are connected in the NoC by NoC Packet Switches (NPSs) as shown in the following figure. The NPS features are as follows:

  • Each NPS is a full-duplex 4x4 switch.
  • Each port supports eight virtual channels in each direction.
  • Each port is fully buffered and contains eight FIFOs (one per virtual channel).
  • The switching system uses a credit-based flow control.
  • A minimum of two latency cycles through the switch.
  • Configurable QoS.
  • Programmable routing table per input-port / per virtual channel:
    • The routing table is programmed through the NPI at boot-time.
    • The routing table can be re-programmed if the NoC is on hold (quiesced).
Figure 1. NoC Packet Switch

Incoming packets are received by the switch. The receiving switch sends flow control credits back to the transmitter switch. The flow control credits are the guarantee that the switch will accept the data transaction, and are therefore important for switch-to-switch communication.

When data arrives at a switch, it checks the destination ID in the packet header to determine the output port of the switch to route the packet to. The destination ID is checked to flag any fatal error conditions if a packet is mis-routed. The buffered destination address is used in a routing table to select the required switch output port.

An incoming data transaction is used in output arbitration when the corresponding virtual channel buffer is empty; otherwise the data is stored in the virtual channel buffer for subsequent virtual channel arbitration. Each cycle arbitration candidate from each input port is presented at each output port of a switch.

Each virtual channel has an associated FIFO, therefore there are eight FIFOs available per switch port.
  • The HNoC ports have a seven deep FIFO.
  • The VNoC ports have a five deep FIFO.