Non-Flipped versus Flipped - 1.0 English

Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2022-12-14
Version
1.0 English

All the supported configurations have two versions of the pinout; Non-Flipped and Flipped. The Flipped version of the pinout is available for the following reasons:

  • To provide the option to free up as many pins as possible that are not under the transceivers and processor systems for user system designs.
  • To provide flexibility for PCB layout engineers for better signal routing.
  • To provide the option to have contiguous XPIO Banks for user system designs.

The following illustration of the XPIO Banks in an XCVC1902VSVA2197 device will help explain the need for the flipped version of the pinout.

Figure 1. XPIO Banks in XCVC1902VSVA2197

XPIO Banks 703 through 710 are fully fabric accessible and can be used for integrated memory controller designs as well as non-memory designs. XPIO Banks 700, 701, part of 702, and 711 can only be used for integrated memory controller designs. As an example, if the system requires a single rank L/RDIMM integrated memory controller and multiple non-memory designs then it would necessitate optimal pin utilization. As shown in the non-flipped single rank L/RDIMM pinout targeting XPIO Banks 709, 710, and 711 there are Free nibbles in Bank 711 which cannot be used for non-memory designs.

Figure 2. Non-Flipped Single Rank L/RDIMM pinout

In this scenario using the flipped single rank L/RDIMM pinout would result in Free nibbles in XPIO Bank 709 allowing the use of these Free nibbles for non-memory designs.

Figure 3. Flipped Single Rank L/RDIMM pinout

The selection of Non-Flipped vs. Flipped pinout is controlled by the Pinout Swapping check box in the DDR Memory tab of the AXI NoC configuration dialog. For interleaved memory controllers, pinout swapping can be selected separately for each interleaved controller.