Read Centering (Complex) - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2023-11-01
Version
1.0 English

Calibration Overview

Note: Only enabled for data rates above 1,600 Mbps.

Complex data patterns are used for advanced read DQS centering for memory systems to improve read timing margin. Long and complex data patterns on both the victim and aggressor DQ lanes impact the size and location of the data eye. The objective of the complex calibration step is to generate the worst case data eye on each DQ lane so that the DQS signal can be aligned, resulting in good setup/hold margin during normal operation with any workload.

There are two long data patterns stored in a block RAM, one for a victim DQ lane, and an aggressor pattern for all other DQ lanes. These patterns are used to generate write data, as well as expected data on reads for comparison and error logging. Each pattern consists of 157 8-bit chunks or BL8 bursts.

Each DQ lane of 1-byte takes a turn at being the victim. An RTL state machine automatically selects each DQ lane in turn, MUXing the victim or aggressor patterns to the appropriate DQ lanes, issues the read/write transactions, and records errors. The victim pattern is only walked across the DQ lanes of the selected byte to be calibrated, and all other DQ lanes carry the aggressor pattern, including all lanes in unselected bytes if there is more than 1-byte lane.

Similar steps to those described in Read DQS Centering are performed, with the PQTR/NQTR starting out at the left edge of the simple window found previously. The complex pattern is written and read back. All bits in a nibble are checked to find the left edge of the window, incrementing the bits together as needed or the PQTR/NQTR to find the aggregate left edge. After the left and right edges are found, it steps through the entire data eye.

CAL_ERROR Decode for Read DQS to DQ/DBI Centering Complex Calibration

The status of Read DQS to DQ/DBI Centering Complex can also be determined by decoding the CAL_ERROR result according to the following table.

Table 1. CAL_ERROR Decode for Read DQS to DQ/DBI Centering Complex Calibration
Error Code Description Recommended Debug Step
0x31 Noise region not found for a given bit in the nibble by incrementing DQ IDELAY Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
0x32 Could not find the left edge of valid data window by incrementing PQTR/NQTR IDELAY together (short complex burst) Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
0x33 Could not find the left edge of valid data window by incrementing PQTR/NQTR IDELAY together (long complex burst) Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
0x34 Could not find the right edge of valid data window by decrementing PQTR/NQTR IDELAY together (short complex burst) Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
0x35 Could not find the right edge of valid data window by decrementing PQTR/NQTR IDELAY together (long complex burst) Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
0x36 Positive sanity check failed Check CAL_ERROR_BIT_*_*, CAL_ERROR_DATA_NIBBLE_*_*, CAL_ERROR_PHY_NIBBLE_*_* XSDB registers to determine which nibbles/bits failed. Check margin found during previous stages of calibration for the given byte that failed.
Table 2. Read Centering (Complex) Registers
Register Name Quantity Description
Fx_RDCMPLX_IDELAY_OFFSET Nibble Idelay at left edge. (in noise region).
Fx_RDCMPLX_PQTR_LEFT_SHORT Nibble Tap value for left side of window with short complex pattern, rising edge (noise to valid).
Fx_RDCMPLX_NQTR_LEFT_SHORT Nibble Tap value for left side of window with short complex pattern, falling edge (noise to valid).
Fx_RDCMPLX_PQTR_LEFT Nibble Tap value for left side of window with long complex pattern, rising edge (noise to valid).
Fx_RDCMPLX_NQTR_LEFT Nibble Tap value for left side of window with long complex pattern, falling edge (noise to valid).
Fx_RDCMPLX_PQTR_RIGHT_SHORT_FCRSE Nibble Short pattern with 10-increment steps for right edge, rising edge (valid to noise).
Fx_RDCMPLX_NQTR_RIGHT_SHORT_FCRSE Nibble Short pattern with 10-increment steps for right edge, falling edge (valid to noise).
Fx_RDCMPLX_PQTR_RIGHT_SHORT Nibble Tap value for right side of window with short complex pattern, rising edge (valid to noise).
Fx_RDCMPLX_NQTR_RIGHT_SHORT Nibble Tap value for right side of window with short complex pattern, falling edge (valid to noise).
Fx_RDCMPLX_PQTR_RIGHT Nibble Tap value for right side of window with long complex pattern, rising edge (valid to noise).
Fx_RDCMPLX_NQTR_RIGHT Nibble Tap value for right side of window with long complex pattern, falling edge (valid to noise).
Fx_RDCMPLX_PQTR_FINAL Nibble Final centered tap value for PQTR.
Fx_RDCMPLX_NQTR_FINAL Nibble Final centered tap value for NQTR.