In the Flow Navigator click. This opens the Project Settings menu on the Simulation tab as shown.
Set the Target simulator to Vivado Simulator.
SystemC Simulation of the NoC
By default, Run Simulation uses a System Verilog behavioral model of the
NoC and DDRMC. Vivado has the ability to use a much faster SystemC model of the
NoC and DDRMC. To enable SystemC
modeling, every instance of the AXI NoC and AXIS NoC needs to have the property SELECTED_SIM_MODEL set to
tlm. The following figure shows changing the
selected sim model to System C by setting it to
tlm (by default, the value is set to
rtl). Note that the SystemC model is much faster but less accurate
compared to the System Verilog model. The SystemC model can be used to verify
functionality, but for modeling performance System Verilog should be used.
The Tcl command to select a simulation model is as follows. Set it to
tlm for SystemC or
rtl for System Verilog.
set_property SELECTEC_SIM_MODEL tlm [get_bd_cells/axi_noc_0]