Each IO Bank contains two XPLLs, one of which is required by the integrated DDRMC. If enabled, the DDRMC uses the left XPLL in the second bank of a triplet in all configurations. In addition, if DDRMC pins are assigned to other banks in that triplet, then the left XPLL for each used bank is also required.
XPLL_X1Y0are in bank
XPLL_X2Y0is the left XPLL in that IO bank. So
XPLL_X2Y0is used by the DDRMC regardless of the configuration, and
XPLL_X4Y0may be used if DDR pins are used in banks