References - 1.0 English

Virtex UltraScale+ FPGAs GTM Transceivers Wizard LogiCORE IP Product Guide (PG315)

Document ID
PG315
Release Date
2022-05-04
Version
1.0 English

These documents provide supplemental material useful with this guide:

  1. Virtex UltraScale+ FPGAs GTM Transceivers User Guide (UG581)
  2. Vivado Design Suite User Guide: Designing with IP (UG896)
  3. Vivado Design Suite User Guide: Logic Simulation (UG900)
  4. Vivado Design Suite User Guide: Getting Started (UG910)
  5. Vivado Design Suite Tutorial: Logic Simulation (UG937)
  6. Vivado Design Suite User Guide: Programming and Debugging (UG908)
  7. UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)
  8. UltraScale Devices Integrated Block for 100G Ethernet LogiCORE IP Product Guide (PG165)
  9. 100G IEEE 802.3bj Reed-Solomon Forward Error Correction LogiCORE IP Product Guide (PG197) (registration required)
  10. 50G IEEE 802.3 Reed-Solomon Forward Error Correction LogiCORE IP Product Guide (PG234) (registration required)
  11. IEEE Standard for Ethernet (IEEE Std 802.3-2015)
  12. Vivado Design Suite Tutorial: Logic Simulation (UG937)
  13. UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)