When an instance is generated, the total width of an entry is calculated:
The key width is counted twice to accommodate for the ternary mask width. The valid bit adds one extra bit to the entry width. The total entry width is then mapped to the required number of block RAMs or URAMs necessary to read the entire entry in parallel. Block RAM and URAM are allocated in data width increments of 64 bits. To minimize quantification losses, it is beneficial if the entry size is close below or on a 64-bit boundary. For example, if the total entry size is 308 bits, the quantification loss is 12 bits per entry: 5*64 - 308 = 12.
The maximum supported entry widths are listed in the following table.