Register Space - 1.0 English

Clocking Wizard for Versal ACAP LogiCORE IP Product Guide (PG321)

Document ID
PG321
Release Date
2022-04-20
Version
1.0 English

The following sections describe the set of registers applicable when the Dynamic Reconfiguration Mode is selected. All registers are accessed as 32-bit. The tables mention the default value of the registers and a brief description about them.