IP Interrupt Status (0x000C) Register - 1.1 English

Video Scene Change Detection LogiCORE IP Product Guide (PG322)

Document ID
PG322
Release Date
2023-11-10
Version
1.1 English

This is a dual purpose register. When an interrupt occurs, the corresponding interrupt source bit is set in this register. In readback mode (Get status), the interrupting source can be determined. In writeback mode (Clear interrupt), the requested interrupt source bit is cleared.