Instruction Format - 1.0 English

DSP Macro LogiCORE IP Product Guide (PG323)

Document ID
PG323
Release Date
2022-11-07
Version
1.0 English

The instructions are case insensitive and ignore spaces between operands. The left side of the arithmetic expression, P=, is implicitly declared and should not be specified.

Table 1. Instruction Formats
Valid Operands D, A, ACIN, B, BCIN, CONCAT, C, PCIN, CARRYIN, CARRYCASCIN, 0 Note that the CONCAT port is the concatenation of the A and B ports, used when the DSP is used as an adder. This is sometimes referred to as A:B in DSP opmodes.
Valid Operators +, -, *, >>17 | >>23 The >>17 operator targets the DSP48 17-bit wire shift; valid only for P and PCIN operators and not valid for VersalĀ® devices. In Versal devices, this becomes a 23-bit wire shift and the operator changes to >>23, targeting the DSP58 23-bit wire shift.
Valid Functions rndsimple, rndsym, rndmacc Rounding functions require that the P output width is less than full precision. See Supported Functions for further details.